Re: http://www.postgresql.org/doxlist.html (fwd) - Mailing list pgsql-hackers

From Tatsuo Ishii
Subject Re: http://www.postgresql.org/doxlist.html (fwd)
Date
Msg-id 20000506163635N.t-ishii@sra.co.jp
Whole thread Raw
In response to Re: http://www.postgresql.org/doxlist.html (fwd)  (Tom Lane <tgl@sss.pgh.pa.us>)
Responses Re: http://www.postgresql.org/doxlist.html (fwd)  (Tom Lane <tgl@sss.pgh.pa.us>)
List pgsql-hackers
> BTW, hackers: does anyone understand just how the spinlock support
> works on PPC, SPARC, etc?  For example, I see that include/port/linux.h
> defines HAS_TEST_AND_SET for __powerpc__ or __sparc__, but that should
> mean that there's a machine-specific tas() subroutine somewhere.  All
> I can find is code in backend/storage/buffer/s_lock.c that looks like
> the right thing, but it's called tas_dummy() not tas()!  How does
> control get to it?

I'm not sure about sparc but... in the following asm code, there is a
symbol "tas" that is visibile to linker. I rember that tas() codes on
some platforms used to do similar thing as sparc and power pc. Now
they have been rewritten so that they use the inlining. The reason why
power pc still remains as it is is just I don't know how to write
power pc asm code suitable for inlining :-)

static void
tas_dummy()
{__asm__("        \n\
.global        tas        \n\
tas:                \n\    lwarx    5,0,3    \n\    cmpwi    5,0    \n\    bne    fail    \n\
[snip]
--
Tatsuo Ishii


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