Neil Conway <neilc@samurai.com> writes:
> On Mon, 2004-10-18 at 04:13, Tom Lane wrote:
>> Do you have any actual evidence for that opinion? ISTM this is
>> dependent on a large set of assumptions about the CPU's bus behavior,
>> boiling down to the conclusion that an extra conditional branch is
>> cheaper than a locked bus cycle.
> I think the conditional branch is effectively free: we're spinning in a
> busy-wait loop, so we're effectively throwing away cycles until the lock
> is free anyway.
Only once we've begun to spin. The first time through, it's not at all
clear whether the extra test is worthwhile --- it's certainly a win if
the lock is always already held, and certainly a loss if the lock is
always free, and otherwise you have to do some benchmarking to decide
if you want it or not. We have the ASM-level test on those platforms
where people seem to think that it is worthwhile, but not everywhere.
As near as I can tell, your proposal is to never have the extra test on
the initial TAS (because you'll remove it from the ASM) and to have it
always on repeated tests (inside the spin loop). This is not what is
done elsewhere AFAICS, and I'm not prepared to take on faith that it's
a win.
regards, tom lane
