Re: Caching by Postgres

From: PFC
Subject: Re: Caching by Postgres
Date: ,
Msg-id: op.sv03chd0th1vuj@localhost
(view: Whole thread, Raw)
In response to: Re: Caching by Postgres  (Alan Stange)
List: pgsql-performance

Tree view

Caching by Postgres  (gokulnathbabu manoharan, )
 Re: Caching by Postgres  (John A Meinel, )
  Re: Caching by Postgres  (Josh Berkus, )
 Re: Caching by Postgres  (Bruno Wolff III, )
 Re: Caching by Postgres  (Frank Wiles, )
  Re: Caching by Postgres  (Donald Courtney, )
   Re: Caching by Postgres  (Tom Lane, )
   Re: Caching by Postgres  (Josh Berkus, )
    Re: Caching by Postgres  (Michael Stone, )
   Re: Caching by Postgres  (, )
   Re: Caching by Postgres  (William Yu, )
    Re: Caching by Postgres  (PFC, )
     Re: Caching by Postgres  (Josh Berkus, )
      Re: Caching by Postgres  (PFC, )
     Re: Caching by Postgres  (Gavin Sherry, )
      Re: Caching by Postgres  (Tom Lane, )
       Re: Caching by Postgres  (Gavin Sherry, )
    Re: Caching by Postgres  (Donald Courtney, )
     Re: Caching by Postgres  (Stephen Frost, )
     Re: Caching by Postgres  (, )
      Re: Caching by Postgres  (Alan Stange, )
       Re: Caching by Postgres  (, )
        Re: Caching by Postgres  (Alan Stange, )
         Re: Caching by Postgres  (, )
        Re: Caching by Postgres  (Michael Stone, )
         Re: Caching by Postgres  (, )
       Re: Caching by Postgres  (PFC, )
      Re: Caching by Postgres  (Thomas Ganss, )
     Re: Caching by Postgres  (William Yu, )
 Re: Caching by Postgres  (Chris Browne, )
 Re: Caching by Postgres  (Chris Browne, )


> At least on Sparc processors, v8 and newer, any double precision math
> (including longs) is performed with a single instruction, just like for
> a 32 bit datum.  Loads and stores of 8 byte datums are also handled via
> a single instruction.   The urban myth that 64bit math is
> different/better on a 64 bit processor is just that;  yes, some lower
> end processors would emulate/trap those instructions but that an
> implementation detail, not architecture.    I believe that this is all
> true for other RISC processors as well.
>
> The 64bit API on UltraSparcs does bring along some extra FP registers
> IIRC.

    It's very different on x86.
    64-bit x86 like the Opteron has more registers, which are very scarce on
the base x86 (8 I think). This alone is very important. There are other
factors as well.

> Solaris, at least, provided support for far more than 4GB of physical
> memory on 32 bit kernels.  A newer 64 bit kernel might be more
> efficient, but that's just because the time was taken to support large
> page sizes and more efficient data structures.  It's nothing intrinsic
> to a 32 vs 64 bit kernel.

    Well, on a large working set, a processor which can directly address more
than 4GB of memory will be a lot faster than one which can't, and has to
play with the MMU and paging units !


pgsql-performance by date:

From: mark@mark.mielke.cc
Date:
Subject: Re: Caching by Postgres
From: Ulrich Wisser
Date:
Subject: Need for speed 2