On Tue, 28 Jul 2009, Dave Youatt wrote:
> Unlikely. Different threads on the same CPU core share their resources, so they don't
> need an explicit communication channel at all (I'm simplifying massively here). A real
> interconnect is only needed between CPUs and between different cores on a CPU, and of
> course to the outside world. Scott's explanation of why SMT works better now is much more
> likely to be the real reason.
Actually, no, I wrote that. Please give at least some indication when
replying to an email which parts of it are your words and which are quotes
from someone else. Emails can be incredibly confusing without that
distinction.
You actually wrote:
> :-) there's also this interconnect thingie between sockets, cores and memory. Nehalem has
> a new one (for Intel), integrated memory controller, that is. And a new on-chip cache
> organization.
This, (like I mention elsewhere) will make the CPU faster overall, but is
unlikely to increase the performance gain of switching SMT on. In fact,
having a lower latency memory controller is more likely to reduce some of
the problem that SMT is trying to address - that of a single thread
stalling on memory access.
Having said that, memory access latency is not scaling as quickly as CPU
speed, so over time SMT is going to get more important.
Matthew
--
"Take care that thou useth the proper method when thou taketh the measure of
high-voltage circuits so that thou doth not incinerate both thee and the
meter; for verily, though thou has no account number and can be easily
replaced, the meter doth have one, and as a consequence, bringeth much woe
upon the Supply Department." -- The Ten Commandments of Electronics
