Re: [PATCH] Fix ARM64/MSVC atomic memory ordering issues on Win11 by adding explicit DMB ​barriers - Mailing list pgsql-hackers

From Thomas Munro
Subject Re: [PATCH] Fix ARM64/MSVC atomic memory ordering issues on Win11 by adding explicit DMB ​barriers
Date
Msg-id CA+hUKG+v8uqSibXXg5c1+qwJVY0nmpp_2YbTCpN8qrFwb+dvew@mail.gmail.com
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In response to Re: [PATCH] Fix ARM64/MSVC atomic memory ordering issues on Win11 by adding explicit DMB ​barriers  ("Greg Burd" <greg@burd.me>)
Responses Re: [PATCH] Fix ARM64/MSVC atomic memory ordering issues on Win11 by adding explicit DMB ​barriers
List pgsql-hackers
On Thu, Dec 11, 2025 at 5:32 AM Greg Burd <greg@burd.me> wrote:
> Rebased with only minor changes to meson.build this patch is ready for review/commit as it is passing tests on my
aarch64Win11 MSVC system.  Also note that this system I'm testing on is ready to become a member of the buildfarm
(applicationsubmitted) and monitor this combo in perpetuity. 

-  if cc.links(prog, name: '__crc32cb, __crc32ch, __crc32cw, and
__crc32cd without -march=armv8-a+crc',
...
+  if host_machine.cpu_family() == 'aarch64'

I think this new nesting of the CRC32 feature tests breaks the test on
"armv7" distros (in our build farm, that's a bunch of RPis running
Debian/Raspbian, but at least FreeBSD and NetBSD also support
"armv7").  Any ARM chip made since around 2011 is really an ARMv8+
chip running Aarch32 code and can thus reach the ARMv8 instructions.
For example "grison" says:

checking build system type... (cached) armv7l-unknown-linux-gnueabihf
...
checking which CRC-32C implementation to use... ARMv8 CRC instructions
with runtime check

-#define S_UNLOCK(lock)    \
+#define S_UNLOCK(lock) \

Bogus whitespace change.



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