On 01/09/2018 03:30 PM, Andreas Joseph Krogh wrote:
Hi,
On 2018-01-09 21:47:17 +0100, Andreas Joseph Krogh wrote:
> Does PG use HW-accellerated crc if CPU supports it[1]?
Yes we do, for WAL checksums. The page checksums are a different
algorithm though, one which has the advantage of being SIMD compatible.
The checksum computations have some impact, but if there's bigger impact
it's much more likely to be related to the fact that some hint bit
writes to a page now needs to be WAL logged.
But SIMD-instructions are also HW-accellerated by modern CPUs IIUC?
So, if these CRCs all are HW-accelerated the penalty chould be next to neglishable?
Leading directly back to JD's proposed documentation update.
