Simon Riggs wrote:
> As you know, I have raised the need for specific hardware tuning in
> certain critical areas on a number of occasions. I very much respect the
> need for all of the other aspects of code quality mentioned.
>
> Pipeline parallelism is a feature of all modern CPUs since the Pentium,
> not just Intel's. I think judicious exploitation of hardware features
> that are common to multiple hardware architectures would be of
> considerable benefit to everybody. We do already exploit some common
> hardware tuning recommendations, such as buffer word alignment, but not
> others such as false sharing avoidance and pipeline parallelism of key
> loops. (There may be others...)
>
> I say "judicious" because I do not presume that I am the judge ... but I
> hope that judgements in these areas can fall towards the side of greater
> performance as often as possible. Hardware and OS do exist, much as I
> would prefer the simplicity of life in a layered IT architecture.
Right. We already have per-cpu test-and-set locks, and lots of macros,
so we just need to decide what places we need these optionations, and
how to do it cleanly.
--
Bruce Momjian | http://candle.pha.pa.us
pgman@candle.pha.pa.us | (610) 359-1001
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