Tom Lane wrote:
>I wrote:
>> We could ameliorate this if there were a way to acquire ownership of the
>> cache line without necessarily winning the spinlock. I'm imagining
>> that we insert a "dummy" locked instruction just ahead of the xchgb,
>> which touches the spinlock in such a way as to not change its state.
>
> I tried this, using this tas code:
...
I have tried it on the P4 w/ HT.
CVS tip 1: 37s 2: 78s 4: 159s 8: 324
only slock-no-cmpb 1: 37s 2: 82s 4: 178s 8: 362
only dummy-locking 1: 44s 2: 96s 4: 197s ...
I guess there is no reason to try any more.
Best Regards,
Michael Paesold
